MARC details
000 -LEADER |
fixed length control field |
04919nam a22005775i 4500 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
TR-AnTOB |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20231115161156.0 |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr nn 008mamaa |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
220614s2022 sz | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9783030964153 |
024 7# - OTHER STANDARD IDENTIFIER |
Standard number or code |
10.1007/978-3-030-96415-3 |
Source of number or code |
doi |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
TR-AnTOB |
Language of cataloging |
eng |
Transcribing agency |
TR-AnTOB |
Description conventions |
rda |
041 ## - LANGUAGE CODE |
Language code of text/sound track or separate title |
İngilizce |
050 #4 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7874 |
072 #7 - SUBJECT CATEGORY CODE |
Subject category code |
TJFC |
Source |
bicssc |
|
Subject category code |
TEC008010 |
Source |
bisacsh |
|
Subject category code |
TJFC |
Source |
thema |
090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) |
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
TK7874EBK |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Kahng, Andrew B. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
245 10 - TITLE STATEMENT |
Title |
VLSI Physical Design: From Graph Partitioning to Timing Closure |
Medium |
[electronic resource] / |
Statement of responsibility, etc. |
by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu. |
250 ## - EDITION STATEMENT |
Edition statement |
2nd ed. 2022. |
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
Place of production, publication, distribution, manufacture |
Cham : |
Name of producer, publisher, distributor, manufacturer |
Springer International Publishing : |
-- |
Imprint: Springer, |
Date of production, publication, distribution, manufacture, or copyright notice |
2022. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
1 online resource |
336 ## - CONTENT TYPE |
Content type term |
text |
Content type code |
txt |
Source |
rdacontent |
337 ## - MEDIA TYPE |
Media type term |
computer |
Media type code |
c |
Source |
rdamedia |
338 ## - CARRIER TYPE |
Carrier type term |
online resource |
Carrier type code |
cr |
Source |
rdacarrier |
347 ## - DIGITAL FILE CHARACTERISTICS |
File type |
text file |
Encoding format |
PDF |
Source |
rda |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
1 Introduction -- 2 Netlist and System Partitioning -- 3 Chip Planning -- 4 Global and Detailed Placement -- 5 Global Routing -- 6 Detailed Routing -- 7 Specialized Routing -- 8 Timing Closure. A Solutions to Chapter Exercises -- B Example CMOS Cell Layouts. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings. Link with additional documents: https://www.ifte.de/books/eda/index.html “This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics.” Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group “This is the book I wish I had when I taught EDA in the past, and the one I’m using from now on.” Dr. Louis K. Scheffer, Howard Hughes Medical Institute “I would happily use this book when teaching Physical Design. I know of no other work that’s as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!” Prof. John P. Hayes, University of Michigan “The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.” Prof. Kurt Keutzer, University of California, Berkeley “An excellent balance of the basics and more advanced concepts, presented by top experts in the field.” Prof. Sachin Sapatnekar, University of Minnesota. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Electronic circuits. |
|
Topical term or geographic name entry element |
Logic design. |
|
Topical term or geographic name entry element |
Electronics. |
|
Topical term or geographic name entry element |
Computer-aided engineering. |
|
Topical term or geographic name entry element |
Electronic Circuits and Systems. |
|
Topical term or geographic name entry element |
Logic Design. |
|
Topical term or geographic name entry element |
Electronics and Microelectronics, Instrumentation. |
|
Topical term or geographic name entry element |
Computer-Aided Engineering (CAD, CAE) and Design. |
653 #0 - INDEX TERM--UNCONTROLLED |
Uncontrolled term |
Integrated circuits -- Very large scale integration -- Design and construction |
|
Uncontrolled term |
Timing circuits -- Design and construction |
|
Uncontrolled term |
Computer-aided design |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Lienig, Jens. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
|
Personal name |
Markov, Igor L. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
|
Personal name |
Hu, Jin. |
Relator term |
author. |
Relator code |
aut |
-- |
http://id.loc.gov/vocabulary/relators/aut |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
SpringerLink (Online service) |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
<a href="https://doi.org/10.1007/978-3-030-96415-3">https://doi.org/10.1007/978-3-030-96415-3</a> |
Materials specified |
Springer eBooks |
Public note |
Online access link to the resource |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
Library of Congress Classification |
Koha item type |
E-Book |