000 01063 a2200325 4500
999 _c57351
_d14545
001 57351
003 TR-AnTOB
005 20221109102542.0
008 070113s1996 nyua b 001 0 eng
010 _a96006102
020 _a0780311493
040 _aDLC
_cDLC
_dDLC
_beng
_erda
041 _aeng
050 _aTK7872.P38
_bR39 1996
090 _aTK7872.P38 R39 1996
245 0 _aMonolithic phase-locked loops and clock recovery circuits :
_btheory and design /
_cedited by Behzag Razavi.
264 1 _aNew York :
_bIEEE Press,
_cc1996.
300 _aix, 498 p. :
_bill. ;
_c29 cm.
500 _a"A selected reprint volume."
650 _aPhase-locked loops
_xDesign and construction
_929928
650 _aTiming circuits
_xDesign and construction
_929929
650 _aIntegrated circuits
_xDesign and construction
_9386
700 _aRazavi, Behzad
_929927
856 4 _uhttp://www.loc.gov/catdir/description/wiley036/96006102.html
_3Publisher description
901 _a0017723
902 _abs
942 _cBK
_2lcc