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_c58822 _d22536 |
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008 | 110202s2005 njua b 001 0 d | ||
010 | _a2004304438 | ||
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_aGBA628560 _2bnb |
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_a013097268 _2Uk |
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020 | _a0131491792 | ||
020 | _a9780131491793 | ||
020 | _a0131964267 (pbk.) | ||
020 | _a9780131964266 (pbk.) | ||
029 |
_aNLGGC _b270074171 |
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029 |
_aYDXCP _b2100658 |
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035 | _a(OCoLC)56722938 | ||
040 |
_aNED _cNED _dDLC _dOCL _dBAKER _dUKM _dCCS _dYDXCP _dTRTET |
||
041 | _aeng | ||
049 | _aMAIN | ||
050 |
_aQA76.9.A73 _bC595 2005 |
||
090 | _aQA76.9.A73 C595 2005 | ||
100 |
_aComer, Douglas _92636 |
||
245 | 0 |
_aEssentials of computer architecture / _cDouglas E. Comer. |
|
264 | 1 |
_aUpper Saddle River, N.J. : _bPearson/Prentice Hall, _cc2005. |
|
300 |
_axxiii, 369 p. : _bill. ; _c25 cm. |
||
504 | _aIncludes bibliographical references and index. | ||
505 | 0 | _aIntroduction and overview -- Fundamentals of digital logic -- Data and program representation -- The variety of processors and computational engines -- Processor types and instruction sets -- Operand addressing and instruction representation -- CPUs: microcode, protection, and processor modes -- Assembly languages and programming paradigm -- Memory and storage -- Physical memory and physical addressing -- Virtual memory technologies and virtual addressing -- Caches and caching -- Input/output concepts and terminology -- Buses and bus architectures -- Programmed and interrupt-driven I/O -- A programmer's view of devices, I/O, and buffering -- Parallelism -- Pipelining -- Assessing performance -- Architecture examples and hierarchy -- Lab exercises for a computer architecture course. | |
650 | 0 |
_aComputer architecture _91708 |
|
650 | 7 |
_aBilgisayar mimarisi _2etuturkob _91709 |
|
901 | _a0018107 | ||
902 | _aGT | ||
938 |
_aYBP Library Services _bYANK _n2100658 |
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938 |
_aBaker & Taylor _bBKTY _c93.00 _d93.00 _i0131491792 _n0006038147 _sactive |
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994 |
_aC0 _bTRTET |
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942 | _cBK |